l l o o w w - - p p o o w w e e r r , , h h i i g g h h - - s s e e n n s s i i t t i i v v i i t t y y 2 2 . . 5 5 g g b b p p s s t t r r a a n n s s i i m m p p e e d d - - a a n n c c e e a a m m p p l l i i f f i i e e r r f f a a b b r r i i c c a a t t e e d d i i n n s s u u b b - - m m i i c c r r o o n n c c m m o o s s the m02015 transimpedance amplifier (tia) with automatic gain control (agc) is fabricated in sub-micron cmos for high performance. with typical transimpedance of 9k ohms differential and input-referred noise of 280na, sensitivities of -26 dbm are achievable. with an input overload capability greater than 6ma p-p, the agc allows more than 32 db of dynamic range, providing a low-cost solution for longer-reach 2.5 gbps gpon/atm/sonet systems, as well as multi-rate 1x/2x fibre-channel and gigabit ethernet transceivers. for optimum system performance, the m02015 die should be mounted with a silicon or ingaas pin photodetector inside a lensed to-can or other optical sub-assembly. t t r r a a n n s s i i m m p p e e d d a a n n c c e e a a m m p p l l i i f f i i e e r r ( ( t t i i a a ) ) the tia consists of a high gain single-ended cmos amplifier with a feedback resistor. the feedback creates a virtual low impedance at the input, and nearly all of the input current passes through the feedback resistor, defining the voltage at the output. advanced cmos design techniques are employed to maintain the stability of this stage across all input condi- tions. an on-chip low dropout linear regulator has been incor- porated into the design to give excellent noise rejection up to several mhz. higher frequency power supply noise is removed by the external 470 pf decoupling capacitor connected to pink. the circuit is intended to be configured for use with pin photodiodes in the grounded cathode configuration with the anode connected to the input of the tia and the cathode connected to the pink terminal. the pink terminal provides a ~2.6v reverse dc bias to reduce the photodiode capacitance. operation with an external bias supply to a higher potential than 2.6v is possible, as required by avalanche photodiodes. a a u u t t o o m m a a t t i i c c g g a a i i n n c c o o n n t t r r o o l l ( ( a a g g c c ) ) the m02015 has been designed to operate over the input range of +6 dbm to C26 dbm @ 2.5 gbps. the agc operates on signals greater than ~ 30ua p-p. the agc pad allows the agc to be disabled during photodiode alignment by grounding the pad through a low impedance. the agc control voltage can be monitored during normal operation at this pad by a ? > > typical -26 dbm sensitivity, > +6 dbm saturation at 2.5 gbps > > bandwidth 1.8 ghz (typical) > > input-referred noise of 280na (typical) > > overload of 6ma p-p > > typical differential transim- pedance: 9k > > maximum jitter of 70 ps p-p > > differential 100 output impedance > > operates on a single 3.3v supply > > monitor output > > agc provides dynamic range of more than 32 db > > k k e e y y f f e e a a t t u u r r e e s s 2 2 . . 5 5 g g b b p p s s t t r r a a n n s s i i m m p p e e d d a a n n c c e e a a m m p p l l i i f f i i e e r r w w i i t t h h a a g g c c m m 0 0 2 2 0 0 1 1 5 5
w w w w w w . . m m i i n n d d s s p p e e e e d d . . c c o o m m / / s s a a l l e e s s o o f f f f i i c c e e s s general information: (949) 579-3000 headquarters C newport beach 4000 macarthur blvd., east tower newport beach, ca 92660-3007 02015-BRF-001-A ? 2006 mindspeed technologies, inc. all rights reserved. mindspeed and the mindspeed logo are trademarks of mindspeed technologies. all other trademarks are the prop- erty of their respective owners. although mindspeed technologies strives for accu- racy in all its publications, this material may contain errors or omissions and is subject to change without notice. this material is provided as is and without any express or implied warranties, including merchantability, fitness for a particular purpose and non-infringement. mindspeed technologies shall not be liable for any special, indirect, incidental or consequential damages as a result of its use. ? a a p p p p l l i i c c a a t t i i o o n n s s ? atm/sdh/sonet ? oc-48 ? gpon onu/ont ? multi-rate 1x/2x fibre channel and ethernet o o r r d d e e r r i i n n g g i i n n f f o o r r m m a a t t i i o o n n ? m02015-a3: waffle pack (wp) ? m02015-qspbg: quarter wafer p p r r o o d d u u c c t t h h i i g g h h l l i i g g h h t t s s high impedance (> 10 m ) circuit. a control voltage can drive the agc pad, locking the gain to a certain value if desired. o o u u t t p p u u t t s s t t a a g g e e the signal from the tia enters a phase splitter followed by a dc-shift stage and a pair of voltage follower outputs. these are designed to drive a differential (100 ) load. they are stable for driving capacitive loads, such as interstage filters. each output has its own gnd pad, all four gnd pads on the chip should be connected for proper operation. since the m02015 exhibits rapid roll-off (3 pole), simple external filtering is sufficient. m m o o n n i i t t o o r r o o / / p p high impedance output mirrors the average photodiode current for monitoring purposes. the current mirror sinks current to ground. connecting a 1k ohm resistor to vcc allows direct voltage measurement. dc restore 2.5 k phase splitter b.i.s.t. en agc pina pink mon dout dout 2.6 v 1 v dc shift rm vcc pink pina dout doutb monitor output 470 pf 1 nf m02015 block diagram recommended circuit
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